Design And Reuse SoC News Alert

December 14, 2004

Michael,
Welcome to issue of December 14, 2004 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

SPONSORED BY: eASIC, Corp.

NRE-free Structured ASIC

ASIC-like unit-cost, power and performance

FPGA-like ease of design (SRAM-LUT)

Flexible exchange between logic and distributed memory

No minimum volume required

Turnaround: < 2 weeks

Built-in clock tree, BIST, scan chain and power distribution

Easy post-fabrication debug - LUT reload

Variety of configurable I/Os

Embedded 8051 microcontroller

NEWS FROM D&R IP/SOC CONFERENCE

Panel ponders present, future of verification IP (by Peter Clarke)

IP SoC panel touts multithreading (by Mike Santarini)

ST keynoter sings praises of transaction level modeling (by Peter Clarke)

APIs can help handle FPGA complexity, says Xilinx CTO (by Peter Clarke)

Standards panel outlines ESL progress (by Peter Clarke)

Spirit consortium releases IP integration standard (by Mike Santarini & Richard Goering)

PDKChek Process Verification IP Introduced for Fabless IC Houses

Mentor Graphics Announces Platform Express Product Support for the new SPIRIT 1.0 Specification - Platform Express Users Can Now Create SoC Designs Using SPIRIT 1.0 Compatible IP

AMBA 3 AXI Master/Slave Verification IP from Synopsys

USB2.0 PHY LS-FS-HS 3.3-1.8-1.8 UTMI+ (SMIC 0.18um) from ChipIdea Microelectronics

IEEE 802.15.4 and ZigBee ready software products from Airbee Wireless, Inc.

SPI 3.0 Core from eInfochips, Inc.

LCD Controller for STN and TFT displays with AMBA AHB interface from R&D Technologies Ltd.

Wanted IPs :

Wi-Max 802.16

Bringing Order to Multi-Core Processor Chaos

Intellectual Discussion

IP licensees expand config core options

A new role for configurability

IP/SOC PRODUCTS

Celoxica Introduces PixelStreams Platform for Streaming Video Processing

Virage Logic Announces Qualification of Embedded Non-Volatile Memory on Tower Semiconductor's 180-nm CMOS Logic Process

DEALS

Chinese Mobile Developer CYIT Chooses Java Technology-Enabled ARM9E Family Processor For 3G Demand

K-Micro (Kawasaki Microelectronics) Licenses SafeNet's SafeXcel IP Security Engines for its ASIC IP Portfolio

BUSINESS

Tensilica Partners with eInfochips to Set Up Software Development Center in India

Aplus Flash Technology partners with GlobalCAD to provide 0.18um logic cell library for its embedded 0.18um NTP customers

DSP Group buys Bermai's Wi-Fi chip IP

Banc of America Equity Partners Invests in Ittiam Systems

FINANCIAL RESULTS

Xilinx Business Update for December Quarter Fiscal 2005

Faraday Announced Revenue for November Record Revenue of NT$461Million

Actel Corporation Announces Fourth Quarter Business Update

LEGAL

Patriot Scientific (PTSC) Learns of Agreement Validating Its '336 Patent

MOSAID Technologies: Court Denies Remaining Samsung Sanction Appeals

PEOPLE

Ambric, Inc. Adds Industry Veterans to its Start-up Team; New Fabless Semiconductor Company Adds VP of Architecture and Director of IP

DESIGN SERVICES

VeriSilicon Provided Backend Design Service for COMMIT 3G TD-SCDMA Chip, Achieved

EMBEDDED SYSTEMS

HARDI Electronics Unveils Second Generation ASIC Prototyping Platform

NEC Electronics Europe introduces │Clinux operating system for System-on-Chip Lite+

Micro Digital Announces Low-Cost USB Host Stack

FOUNDRIES

AMD, IBM announce semiconductor manufacturing technology breakthrough

TSMC November Sales Report

FPGA/CPLD

Actel ProASIC PLUS FPGAs Chosen by Monterey Bay Aquarium Research Institute for Low-Power, High-Reliability Operation

Xilinx Enables Instant Deployment Of Aurora, Industry's Most Popular, Scalable, Lightweight Serial Connectivity Protocol

Xilinx Continues Focus On Wireless Market With Delivery Of CPRI-Compliant Reference Design

Altera and Leading Power Management Vendors Provide Complete Power Solutions for Stratix II FPGAs

FABLESS

Leading Foundries Spur Widespead Adoption of FSA Mixed-Signal/RF PDK Checklist

EDA

CoWare Adds ARM PrimeCell Peripherals to SystemC ConvergenSC Model Library

Verisity Verification Solutions Used by Agere to Speed New Gigabit Ethernet Chips to Market

SPONSORED BY: TEMENTO SYSTEMS

Temento Systems, innovative provider of test, debug and verify solutions for FPGA and Hardware Platforms now offer two Edition of its DiaLite On-Chip Instrumentation tool. The new HDL Fault Finder IP included into the Power Edge Edition allows accurate monitoring and display of logic events contained into your HDL code. Designers have now the possibility to insert Watchpoints and Breakpoints on the instruments and into the code, and make it run concurrently to the instrumentation.

Click here to know more about Temento

D&R Silicon IP / SoC Catalog :
The world's largest directory of Silicon IP (Intellectual Property), SoC Configurable Design Platforms and SOPC Products from 200 vendors

D&R Software IP Catalog :
A catalog of Hardware dependent Software (HdS) ranging from embedded OS to Communication Stacks and Application Software

D&R Verification IP Catalog :
Speed up your verification of protocol-centric designs by finding the specific Verification IP you need (already more than 100 products listed !!!)

Search for Silicon IP

Search for Verification IP

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